| 摘要 |
<p>PURPOSE: To improve the reliability of the number of times of memory rewritings by providing a variable word line writing method. CONSTITUTION: The figure shows the block diagram of the variable word line writing method. The memory cell in a cell array is controlled with a word line WL1 and a desired word line voltage is fed from an internal power source generating circuit and a word line activating signal realizing a desired impression time is supplied from a word pulse generating circuit to a word driver WD. A shift register activates successively signals PV1 to PVm as a writing cycle progresses to output them to the internal power source generating circuit. At the time of starting the writing cycle, PV1 is activated and the lowest word line voltage is generated with a prescribed absolute value in the internal power source generating circuit and when the writing cycle progresses and PVm is activated, the highest word line voltage is generated in the circuit. In a word width generating circuit, as the writing cycle progresses, PW1 to PWm are successively activated and the shortest pulse width is generated by the activation of PW1 and the longest pulse width is generated by the activation of PWm.</p> |
