| 摘要 |
A logic circuit optimizing apparatus for optimizing a designed logic circuit including a redundant circuit is disclosed. Conventionally, a large number of operations and limitations have been necessary in designing thereof, in order to detect faults included in the designed logic circuit, and the complete detection of the faults was impossible. The logic circuit optimizing apparatus, however, includes the steps of detecting a redundant circuit included in a designed logic circuit (55 to 59), and the step of deleting the detected redundant circuit (62) and, therefore, the redundant circuit can be completely removed from the designed logic circuit. A logic circuit without faults can be thus designed, and the complete detection of faults can be performed.
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