Method and circuit for timing the loading of nonvolatile-memory output data

摘要

A load timing circuit including an output simulation circuit similar to the output circuits of the memory, so as to present the same propagation delay; a simulating signal source for generating a data simulating signal; a synchronizing network for detecting a predetermined switching edge of the data simulating signal and enabling supply of the signal to the output simulation circuit and data supply to the output circuits of the memory; a combinatorial network for detecting propagation of the data simulating signal to the output of the output simulation circuit and disabling the data simulating signal; and a reset element for resetting the timing circuit.