发明名称 |
SAVED WIRING RESET CIRCUIT |
摘要 |
<p>PURPOSE: To reduce the number of reset signal lines without exerting the influence of reset signal voltage upon backup voltage at the time of executing backup for a device having a microcomputer and a storage circuit by using a zero volt terminal for a battery lead wire in common with a reset line. CONSTITUTION: A reset line and a line connected from the battery 0V terminal 5 to a ground line 3 are used in common as a shared line and a low resistor 7 is connected between the shared line and the ground line 3. A Schmitt trigger inverter 12, a resistor 13 and an RC filter constituting a capacitor 14 are serially connected between the reset terminal RST of the device 1 having the microcomputer and the storage circuit and the shared line to form a reset circuit. At the time of executing backup for the device 1, the number of reset signal lines can be reduced without experting the influence of reset signal voltage upon backup voltage.</p> |
申请公布号 |
JPH08115146(A) |
申请公布日期 |
1996.05.07 |
申请号 |
JP19940275621 |
申请日期 |
1994.10.14 |
申请人 |
YASKAWA ELECTRIC CORP |
发明人 |
WATANABE ATSUFUMI;YOSHIDA KATSUMASA |
分类号 |
G01D5/245;G06F1/24;G06F15/78;H03K19/00;(IPC1-7):G06F1/24 |
主分类号 |
G01D5/245 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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