OUTPUT CONTROL CIRCUIT FOR A VOLTAGE REGULATOR

摘要

The preferred embodiment shows a stabilized voltage regulator (figure 2) which offsets changes in the output impedance of the regulator due to changes in load current. The output capacitor (C) is selected primarily based upon filtering requirements rather than on frequency compensation requirements. A depletion mode pass transistor (MD2, figure 3) is used as the output transistor. A PMOS transistor (MP9) on/off switch is connected between the source of the pass transistor (MD2) and the output terminal (VREG) which allows for the regulator to be turned off or on without shutting down the depletion mode pass transistor (MD2). Output voltage affected by process variations of transistors is corrected by a beta factor in a band gap voltage reference generator (figure 4).