Semiconductor memory with static memory cells

摘要

The SRAM includes a semiconductor substrate (1) with two access transistors, two drive transistors, several insulation layers (71,73), and conductive layers (51a,61a). Also provided are two load elements (R1). The access and driven transistor pairs share the same drain source regions and are formed on the substrate main surface. The transistors have their gates upper side and peripheries (15a,25a) covered by one insulating layer (71). Holes (71a) are also covered by this insulating layer. The resistors are connected to either one of the source-drain regions via a respective hole and are covered by the other insulation layer (73). One conductor layer (51a) acts as a word line and lies between the latter insulation layer and a further insulation layer (75). GND wiring (61a) and bit lines (61c,61b) are formed the upper insulation layer.