发明名称 |
Fuzzy logic analog computer architecture |
摘要 |
<p>Analog processor (2) of antecedent parts of fuzzy logic inference rules and comprising a plurality of analog generators (3) of membership function (FA) each having an output (4) supplying a value corresponding to a degree of truth complemented to one ( alpha ') of logical assignments of the type (A is A') with the outputs (4) being connected together to form a common circuit node (7) and also connected to a current generator (9) and the processor (2) comprising also a voltage control device (5) inserted between a supply voltage pole (VD) and a ground voltage reference (GND) and a one-way element (8) connected to the common circuit node (7) and the one-way element (8) having an output (10) producing an overall degree of truth ( OMEGA ) for the antecedent part of the fuzzy rule to be processed. <IMAGE></p> |
申请公布号 |
EP0709790(A1) |
申请公布日期 |
1996.05.01 |
申请号 |
EP19940830517 |
申请日期 |
1994.10.31 |
申请人 |
CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO |
发明人 |
BRUNO,DARIO;GIACALONE,BIAGIO;MANARESI, NICOLO |
分类号 |
G06G7/12;G05F3/24;G06N7/04;(IPC1-7):G06G7/26 |
主分类号 |
G06G7/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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