Integrated circuit and method of making the same

摘要

A method of fabricating dies (31,32,33) on a wafer (30), for integrated circuit devices (10). A single wafer (30) is used to fabricate dies (31,32, and 33) of different lengths. The dies (31,32, and 33) are arranged in a "stacked" pattern across the wafer (30), such that the dies are parallel with shorter dies (33) corresponding to shorter latitudes of the wafer (30) and longer dies (31) corresponding to longer latitudes of the wafer (30). Each die (31,32,33) has the same basic pattern of a left peripheral subcircuit, a repeating middle subcircuit, and a right subcircuit. The varying lengths of the dies (31,32,33) are accomplished by varying the number of repeating middle subcircuits.