| 摘要 |
A bootstrap circuit comprising an inverter for inverting an input signal from an input node, a delay stage for delaying the input signal from the input node for a predetermined time period, a first capacitor connected between an output terminal of the inverter and a junction node, a first NMOS transistor for transferring the input signal delayed by the delay stage to the junction node, the first NMOS transistor having a drain connected to an output terminal of the delay stage, a source connected to the junction node and a gate connected to a supply voltage source, a second capacitor connected between an output node and a ground voltage source, and a second NMOS transistor for transferring the input signal inverted by the inverter to the second capacitor connected to the output node in response to a signal charged on the first capacitor. According to the present invention, the bootstrap circuit bootstraps the input signal to a high voltage level at a high speed.
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