发明名称 |
Method of manufacturing a semiconductor device having an SOI structure |
摘要 |
In etching a polysilicon layer above a gate electrode layer, a portion of the gate electrode layer is left thereunder. The etching process of that polysilicon layer and that gate electrode layer is carried out in two steps of etching the polysilicon layer and an interlayer insulating layer, and etching the gate electrode layer and the gate oxide film. Therefore, the amount that is removed from an SOI layer can be suppressed in the manufacturing process thereof.
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申请公布号 |
US5512501(A) |
申请公布日期 |
1996.04.30 |
申请号 |
US19940342024 |
申请日期 |
1994.11.16 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
HIDAKA, HIDETO;TSURUDA, TAKAHIRO;SUMA, KATSUHIRO |
分类号 |
H01L21/336;H01L21/8238;H01L21/8242;H01L21/8244;H01L21/84;H01L27/10;H01L27/108;H01L29/78;H01L29/786;(IPC1-7):H01L21/86 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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