Method of manufacturing extended drain resurf lateral DMOS devices

摘要

A high voltage PMOS transistor 7 has improved on resistance by adjusting impurity concentration in a lightly doped drift region rim 48 to compensate for impurity segregation which occurs during the growth phase of a thick field oxide 43. During fabrication of high voltage PMOS device 7, a shallow vertical junction 230 formed by impurity segregation into field oxide 43. Implanting an HV drift region p-tank rim adjustment 220 and annealing it forms a lateral junction 250 and isolates the shallow junction 230 under field oxide 43. Thereby, the on-resistance of high voltage PMOS transistor 7 is minimized.