Data communication circuitry for smart card serial I/O

摘要

The input/output device has three registers (31,32,33) connected in series with the serial I/O signal (SIO). The second register (32) has parallel I/O bus connections (PIO-PI7, PO0-PO7). A parity generator (34) is connected to the parallel out of register (32). A receiver (35) receives the Receive Parity (RPB) from the first register (31) and compares it with Data Parity (DPB) to generate a parity decision signal (PBT). In transmit mode, data is transferred to register (32), parity (DPB) is generated, and data is moved by shift clock (SCK).