发明名称 SEMICONDUTOR DEVICE
摘要 PURPOSE: To prevent an inversion due to an ion implantation from reaching a junction, particularly, in an n channel MOSFET and contrive to reduce an n/p junction leak current by a method wherein a depth of an n type diffused layer of an n channel MOSFET is larger than that of a p<+> type diffused layer of a p channel MOSFET. CONSTITUTION: An n wafer 11 is formed on a p type Si substrate 10 to form a field oxide film 12, a gate oxide film 13 and gate electrodes 14a, 14b. Thereafter, by ion-implantating, for example As<+> is introduced into an n channel MOS region at 80keV and 3×10<15> pcs/cm<2> , and for example BF2 <+> is introduced into a p channel MOS region at 40keV and 2×10<15> pcs/cm<2> . Next, activating of impurities and recovering of crystallization are performed by heat treatment to respectively form an n type diffused layer 15a and a p<+> type diffused layer 15b. Then, a depth of the n<+> type diffused layer 15a is about 0.17μm and a depth of the p<+> type diffused layer 15b is about 0.14μm.
申请公布号 JPH08102499(A) 申请公布日期 1996.04.16
申请号 JP19940236391 申请日期 1994.09.30
申请人 HITACHI LTD 发明人 SEKIGUCHI TOMOKO;AOYAMA TAKASHI;SUZUKI MASAYASU;NISHIHARA SHINJI;ABE HIROMI
分类号 H01L21/28;H01L21/768;H01L21/8238;H01L23/522;H01L27/092;(IPC1-7):H01L21/823 主分类号 H01L21/28
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