发明名称 |
Random access memory device with trench-type one-transistor memory cell structure |
摘要 |
A MOS random access memory device includes a semiconductor substrate having a trench formed therein, and an array of memory cells on the substrate. Each of the memory cells includes a 1-bit data-storage capacitor and a transfer-gate MOS transistor. The capacitor includes an insulated layer buried in the trench, which serves as a storage node. An island-shaped semiconductor layer covers the storage-node layer at least partially on the substrate, and is coupled thereto. The transistor has a source and a drain defining a channel region therebetween in the substrate, and an insulated gate overlying the channel region. One of the source and drain is directly coupled to the island-shaped layer, while the other of them is contacted with a corresponding data-transfer line (bit line) associated therewith.
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申请公布号 |
US5508541(A) |
申请公布日期 |
1996.04.16 |
申请号 |
US19930124300 |
申请日期 |
1993.09.20 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
HIEDA, KATSUHIKO;AOKI, MASAMI;HAMAMOTO, TAKESHI |
分类号 |
H01L27/108;H01L27/12;(IPC1-7):H01L27/108 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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