发明名称 Dynamic CMOS logic circuit with precharge
摘要 A first transistor is connected to a second transistor so that the first and second transistors may be initially biased in a non-conducting state when a first node is at a first voltage potential and a second node is at a second voltage potential. A potential altering circuit selectively alters the voltage potential at the first and second nodes, causes the first and second transistors to be in a conducting state for accelerating a voltage transistion at the first and second nodes toward final values, and maintains the first and second nodes at their final voltage potentials for implementing a desired Boolean function.
申请公布号 US5508640(A) 申请公布日期 1996.04.16
申请号 US19930121136 申请日期 1993.09.14
申请人 INTERGRAPH CORPORATION 发明人 PARTOVI, HAMID;DRAPER, DONALD A.
分类号 H03K19/017;H03K19/0948;(IPC1-7):H03K19/017;H03K19/094 主分类号 H03K19/017
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