发明名称 |
Semiconductor integrated circuit device and a method for manufacturing the same |
摘要 |
An improved arrangement is provided for forming a bipolar transistor on a substrate with CMOS elements. All of the transistors (i.e., the bipolar, P-MOS and N-MOS) are formed in regions having gradually decreasing impurity concentrations from the surface toward the substrate. In addition, a buried layer is provided under each of the regions of decreasing impurity concentration in which the transistors are formed. These buried layers have a significantly higher impurity concentration than the portion of the region of decreasing impurity concentration which they are respectively adjacent to. Using this arrangement, punch-through is prevented and excellent electrical operating characteristics are provided for both the bipolar transistors and the CMOS elements.
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申请公布号 |
US5508549(A) |
申请公布日期 |
1996.04.16 |
申请号 |
US19910735948 |
申请日期 |
1991.07.25 |
申请人 |
HITACHI, LTD. |
发明人 |
WATANABE, ATSUO;IKEDA, TAKAHIDE;TSUKUDA, KIYOSHI;HIRAO, MITSURU;MUKAI, TOUJI;KAMEI, TATSUYA |
分类号 |
H01L27/08;H01L21/8249;H01L27/06;H01L27/118;H01L29/68;H01L29/78;(IPC1-7):H01L27/02 |
主分类号 |
H01L27/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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