| 摘要 |
A vertical type field effect transistor includes N-type base regions formed on the surface of a P-type semiconductor substrate, a P-type source region formed in each of the N-type base regions, a gate insulating film formed between the P-type source regions, and a gate electrode formed of polysilicon on the gate insulating film. The transistor has the P-type source regions, the N-type base regions and a lower portion of the P-type semiconductor substrate as three terminals. A method for manufacturing the transistor comprises the steps of: forming the gate insulating film; growing a polysilicon layer; performing ion injection of an N-type impurity for the grown polysilicon layer; and performing heat treatment after the ion injection.
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