发明名称 Low voltage memory
摘要 A floating gate is inserted into the gate stack of an EEPROM cell. For an N channel EEPROM device, the floating gate is composed of a material having a conduction band edge (or fermi energy in the case of a metal or composite that includes a metal) at least one and preferably several kT electron volts below the conduction band edge of the channel region. The floating gate material thus has a larger electron affinity than the material of the channel region. This allows the insulator separating the floating gate and the channel to be made suitable thin (less than 100 angstroms) to reduce the writing voltage and to increase the number of write cycles that can be done without failure, without having charge stored on the floating gate tunnel back out to the channel region during read operations. For a P channel EEPROM device, the floating gate is composed of a material having a valence band edge (or fermi energy in the case of a metal or a composite that includes a metal) at least one and preferably several kT (eV) above the valence band edge of the channel region.
申请公布号 US5508543(A) 申请公布日期 1996.04.16
申请号 US19940236751 申请日期 1994.04.29
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 HARTSTEIN, ALLAN M.;TISCHLER, MICHAEL A.;TIWARI, SANDIP
分类号 H01L21/8247;H01L29/49;H01L29/788;H01L29/792;(IPC1-7):H01L29/76 主分类号 H01L21/8247
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