| 摘要 |
<p>A semiconductor die (18) includes a multiplicity of die bonding pads (20) arrayed about the periphery of a surface of the die (18), and has a plurality of global signal bonding pad (21) located centrally to the peripheral die bonding pads (20). Global signals are those signals which are routed extensively throughout the semiconductor die (18), and include, for example, the power signal, ground signal, and clock signal. When a global signal is provided to the center of the semiconductor chip (18), the signal can be transmitted across the chip with a minimum of skew. In addition, the size of the electrically conductive traces which transmit the global signal within the chip can be decreased, allowing reductions in both semiconductor chip size, and cost. In some embodiments, the global signal inputs are provided in an interconnected lead net (17G) at or near the center of the die surface.</p> |
