发明名称 METHOD AND APPARATUS FOR ANTICIPATORY POWER MANAGEMENT FOR LOW POWER PDA
摘要 <p>A method, system and apparatus for reducing power consumption in low power electronic devices is described. The invention includes an input/output (I/O) circuit that includes a pin enable circuit in which a contingency register holding a contingency bit having a predetermined value is coupled to a power register. During a powerdown state, the contents of the power register is replaced by the contingency bit to determine the state of the I/O circuit. Using such a circuit, the value of the contingency bit can be set so that the I/O circuit continues, or ceases, to supply power to an attached I/O device upon powerdown depending on the value set for the contingency bit.</p>
申请公布号 WO1996010781(A1) 申请公布日期 1996.04.11
申请号 US1995012625 申请日期 1995.09.29
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址