Static random access memory device having high soft error immunity

摘要

An SRAM having a TFT load element has a gate electrode of the load TFTs disposed between bit lines and channel regions of the load TFTs. The structure avoids formation of a parasitic transistor in which each of the bit lines would act as a gate electrode for the channel region of the TFT load element. The SRAM has a high soft error immunity even at a low supply voltage.