Nonlinear function generator having efficient nonlinear conversion table and format converter

摘要

An input value x of floating-point representation is added up with an input value offset by a floating point adder, to be translated to a region where an exponent part is constant. On the basis of an output from the floating point adder, an address decoder generates an address for a lookup table. The lookup table stores only mantissa data in accuracy required for a function value of a necessary nonlinear function. A bit expansion circuit converts a function value read from the lookup table to corresponding numeric data of floating-point representation. The floating point adder subtracts an output value offset and outputs a nonlinear function value of floating-point representation for translating the numeric data received from the bit expansion circuit to its original region. A nonlinear function generator is provided which can efficiently implement nonlinear conversion processing in a digital electronic circuit at a high speed.