| 摘要 |
A PSK signal demodulating apparatus having a clock extracting circuit. The clock extracting circuit includes a counter that is operable by a clock having a frequency N time the carrier frequency of a phase modulated signal such as a pi /4 shift DQPSK modulated wave is latched at the leading edge timing of the above signal thereby to obtain phase data. Also, a difference between these phase data is calculated at mod.2 pi thereby to extract a clock component.
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