发明名称 |
Method and circuit for reducing flicker for a video signal processing apparatus |
摘要 |
The HF and LF signal components of the video signal are separately converted into half frame images at twice the half frame image rate and then recombined. The conversion of the HF signal components is effected via a flicker-free median filter. The conversion of the LF signal components is effected via a movement corrected median filter. An adder (7) receives the output signals of both the HF and LF channels (5,6).
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申请公布号 |
EP0705031(A2) |
申请公布日期 |
1996.04.03 |
申请号 |
EP19950115095 |
申请日期 |
1995.09.25 |
申请人 |
SIEMENS AKTIENGESELLSCHAFT |
发明人 |
BLUME, HOLGER, DIPL.-ING.;ZYGIS, KRZYSZTOF;SCHWOERER, LUDWIG, DIPL.-ING. |
分类号 |
H04N5/44;(IPC1-7):H04N5/44 |
主分类号 |
H04N5/44 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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