发明名称 |
Branch prediction device enabling simultaneous access to a content-addressed memory for retrieval and registration |
摘要 |
The branch prediction device of this invention is for use in a pipeline processor where a plurality of instructions are simultaneously processed in various stages, such as the fetch stage, execution stage, memory access stage and register write stage. A two-port branch prediction buffer enables simultaneous operation of the registration and retrieval processes so that a previously registered address can be obtained during the same clock pulse as registration of another branch address occurs.
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申请公布号 |
US5504870(A) |
申请公布日期 |
1996.04.02 |
申请号 |
US19950448180 |
申请日期 |
1995.05.23 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
MORI, JUNJI;SAITO, MITSUO |
分类号 |
G06F9/38;(IPC1-7):G06F9/38 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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