发明名称 Redundancy circuit for memory
摘要 Memories in integrated circuit form can have several amplifiers per data contact. To increase the possibilities of redundancy with a given number of redundancy columns without, causing too much space near the memory zone to be occupied by complicated multiplexers, the address AP used to select a single amplifier for each contact is used also to select one group of memories among several groups (as many groups as there are amplifiers per contact) in a defective address storage register. Only the defective addresses of this group are applied to a comparator used to detect whether a defective column address is received by the memory. A correlation is thus set up between the place where the defective column is located and the place where the redundancy column, which will be used to replace it, is located. This correlation results from the simultaneous selection by AP of a group of amplifiers and of a group of defective column addresses connected to these amplifiers.
申请公布号 US5504712(A) 申请公布日期 1996.04.02
申请号 US19930097598 申请日期 1993.07.23
申请人 SGS-THOMPSON MICROELECTRONICS S.A. 发明人 CONAN, BERTRAND
分类号 G11C29/00;(IPC1-7):G11C29/00 主分类号 G11C29/00
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