发明名称 LAMINATION HYBRID INTEGRATED CIRCUIT ELEMENT
摘要 <p>PURPOSE: To provide a compact lamination hybrid integrated circuit element and a lamination hybrid integrated circuit element without any rugged parts on the surface. CONSTITUTION: A capacitor part 12 where a hole 12b is formed is superposed at an inductor part 11 and a center part, parts such as an IC 13 and a transistor 14 are mounted into the hole 12b, and a resin 15 is filled into the hole 12b for curing, thus forming a lamination hybrid integrated circuit element 10. Electronic parts are buried into a superposition body where the inductor part 11 and the capacitor part 12 are formed and the height becomes lower than before, thus miniaturizing an element shape and hence improving parts packaging density and miniaturizing the device shape. Also, there are no rugged parts on the element surface, thus automatically packaging onto an electronic parts mounting substrate using an automatic packaging machine and hence improving packaging working efficiency.</p>
申请公布号 JPH0888474(A) 申请公布日期 1996.04.02
申请号 JP19940222182 申请日期 1994.09.16
申请人 TAIYO YUDEN CO LTD 发明人 SUZUKI KAZUTAKA
分类号 H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K3/46
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