| 摘要 |
<p>PURPOSE: To obtain a semiconductor memory device, which can be returned to the normal state without repeated writing and erasure by providing another reserve memory array (redundant memory cell array) in excessive erasing in addition to a normally used memory array. CONSTITUTION: A redundant memory cell array 3 is provided and replaced with a column decoder 11 and a redundant decoder 15 based on the replacement information of a redundant address memory circuit 13. An over-erase detecting circuit 25, which detects the fact that the phenomenon (excessive erasing) wherein the electric charge of a floating gate in the switching means of a memory cell array 1 is discharged to the state higher than zero has occured, in provided. Whether a cell transistor which has caused the excessive erasing is present or not in the memory cell array is checked in the over-erase detecting circuit 25. When the presence is confirmed and the excessive erasing is detected, the corresponding address is supplied into the redundant-address memory circuit 13. Therefore, the column decoder 11 and the redundance decoder 15 replace the redundant memory array 3 based on the address information.</p> |
