| 摘要 |
<p>PURPOSE: To erase information in conformity with the erasing characteristic of each memory cell by monitoring the potential of the floating gate of a non- volatile memory cell at the erasing time of the information, and stopping the supply of an erasing voltage before the occurrence of the excessive erasing state. CONSTITUTION: In a semiconductor memory device having a non-volatile memory cell 10, which stores information by injecting electric charge into a floating gate FG, an erasing control circuit 100, which monitors the potential of the floating gate FG at the erasing time of the information and supplies an erasing voltage VSS into the source of the non-volatile memory cell 10, is provided. The erasing control circuit 100 has a potential monitoring part 11, which monitors the potential of the floating gate FG of the non-volatile memory cell 10, and a voltage supply part 12, which supplies the erasing voltage VSS into the source of the non-volatile memory cell 10 based on a potential monitoring signal Sfg from the potential monitoring part 11.</p> |
