发明名称
摘要 <p>PURPOSE:To easily cope with the display of a large size, for example, by extracting data in parallel individually from plural parallel data registers so as to allow a selector to connect the data registers serially and extracting the data selectively. CONSTITUTION:A data selector consists of addresses A8, A9 added by high-order 2-bit to serial address buffers A0-A7 and a decoder and a selector section operated by decoding the added addresses. Then a control signal is fed selectively to gates of transfer gates 1, 2, 3, 4. Thus, the data is extracted in parallel individually from the plural parallel data registers in a video memory or the like and the connection of the data registers serially to extract a data, which are selected. That is, four sets of 256-bit serial registers and a 1,024-bit register are changed over and the circuit copes easily with a large sized display.</p>
申请公布号 JPH0831269(B2) 申请公布日期 1996.03.27
申请号 JP19860125454 申请日期 1986.05.30
申请人 NIPPON TEKISASU INSUTSURUMENTSU KK 发明人 NAITO ATSUSHI;NAKATSUKA KYOSHI;YAMAMOTO SEIICHI;INUI TAKASHI;SUZUKI TOMOHIRO
分类号 G09G5/36;G06F12/00;G06F12/04;G06T1/60;G09G1/02;G09G5/00;G11C7/00;G11C11/34;G11C11/401;(IPC1-7):G11C7/00 主分类号 G09G5/36
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