发明名称
摘要 <p>An electrical device for logic circuits having a package comprising a combination of controlled collapse electrical interconnections, such as solder balls and pin through-hole conductors, wherein the conductors are disposed outside the perimeter of an inter-array of solder balls, so as to provide an increased footprint for the electrical device beyond that, otherwise maximum footprint for solder balls alone, which footprint is otherwise limited in size due to failures which occur in solder balls when solder balls are exposed to thermal and mechanical stress levels at extended distances from the neutral or zero stress point of the array. <IMAGE></p>
申请公布号 JPH0831667(B2) 申请公布日期 1996.03.27
申请号 JP19940313111 申请日期 1994.12.16
申请人 INTAANASHONARU BIJINESU MASHIINZU CORP 发明人 JIIN JOSEFU GAUDENJI;JOSEFU MAIKERU MOSUREE;BITOO JEEMUZU TAOZORO;JON KUROSUBII MIRIKEN
分类号 H05K1/18;H01L23/12;H01L23/498;H05K3/34;(IPC1-7):H05K1/18 主分类号 H05K1/18
代理机构 代理人
主权项
地址