发明名称 LAMINATION TYPE SEMICONDUCTOR CHIP STRUCTURE AND ITS MANUFACTURE
摘要 PURPOSE: To provide a three-dimensional packaging of stacked semiconductor device chips, which increases the operating speed of a device, enhances the reliability of a package, enhances the adaptability of the package to the already- existing semiconductor device processing technique and is made using an insulating material and an adhesive material. CONSTITUTION: A metal transfer layer 9 is adhered to the surfaces of six passivated chips and all electrical contacts are assembled 14 at the edge part common to the chips. The layer 9 is made to be separated from the surfaces of the chips and the adjacent chips in a stack of the chips by a polymer layer 10, which is low in dielectric constant and has a thermal expansion coefficient matching that of the stacked chips. Adhesion layers 11A and 11 are adhered to the chips and the chips are partially cured at a wafer level and thereafter, when the chips are stacked to form a three-dimensionally stacked material, the chips are completely cured, whereby a coupling of a first polymer layer with the adjacent chips in the stack is reinforced.
申请公布号 JPH0883881(A) 申请公布日期 1996.03.26
申请号 JP19940105115 申请日期 1994.05.19
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 KUROODO RUISU BAATEIN;POORU OORUDEN FUARAA SHINIA;UEIN JIYON HAUERU;KURISUTOFUAA POORU MIRAA;DEEBUITSUDO JIEIKOBU PAARUMAN
分类号 H01L25/00;H01L21/98;H01L23/52;H01L25/065;(IPC1-7):H01L25/00 主分类号 H01L25/00
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