发明名称 |
Path allocation system and method having double link list queues implemented with a digital signal processor (DSP) for a high performance fiber optic switch |
摘要 |
A fiber optic switch interconnects ports (p1-pi) for connection with respective fiber optic channels so that a fiber optic network is realized. Channel modules provide the ports. Each channel module has a port intelligence mechanism for each port and a memory interface system for temporarily storing data passing to and from the ports. A switch module having a main distribution network, an intermix distribution network, and a control distribution network interconnects the memory interface systems and permits exchange of data among the ports and memory interface systems. A path allocation system controls the switch module and allocates the data paths therethrough. The path allocation system has a scheduler which maintains a destination queue (Qp1-Qpi) for each of the ports. The destination queues are implemented with a double link list in a single memory configuration so that a separate queue structure in hardware is not necessary. Moreover, the scheduler is implemented with a digital signal processor (DSP) with on-chip memory so that the queues are implemented within the on-chip memory and can be accessed at high speed.
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申请公布号 |
US5502719(A) |
申请公布日期 |
1996.03.26 |
申请号 |
US19940330044 |
申请日期 |
1994.10.27 |
申请人 |
HEWLETT-PACKARD COMPANY |
发明人 |
GRANT, ROBERT H.;STOEVHASE, BENT;PUROHIT, ROBIN;BOOK, DAVID |
分类号 |
H04B10/20;H04B10/02;H04L12/56;(IPC1-7):H04J13/00 |
主分类号 |
H04B10/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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