发明名称 DIGITAL DELAY CIRCUIT BLOCK, SCANNING CIRCUIT AND DRIVE METHOD FOR THE SCANNING CIRCUIT
摘要 PURPOSE: To realize a scanning circuit and its drive method in which a change in a threshold voltage of transistor(TR) elements is recovered. CONSTITUTION: Circuit blocks A, B each provided with a means that connects a node floating to ground when connecting a clock signal application terminal and a power supply voltage application terminal connect to ground and a means setting a level of part of the nodes to a power supply voltage level are connected in series and the connection circuit acts like a scanning circuit. The scanning circuit is driven by 4-phase clock signals ϕ1,ϕ2,ϕ3,ϕ4 which repeat sequentially a data reception period, a data transfer period, a discharge period and a state setting period and the circuit blocks connected in series are driven by the 4-phase clock signals whose phases are shifted for a phase one by one sequentially.
申请公布号 JPH0884310(A) 申请公布日期 1996.03.26
申请号 JP19940220594 申请日期 1994.09.14
申请人 NEC CORP 发明人 HAYAMA HIROSHI
分类号 G11C19/00;G11C19/28;H03K5/135;H04N3/14;H04N5/335;H04N5/341;H04N5/369;H04N5/374;H04N5/66 主分类号 G11C19/00
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