发明名称 PHASE COMPARATOR AND PLL CIRCUIT
摘要 PURPOSE: To obtain the phase comparator immune to external disturbance with a wide phase comparison range whose phase comparison characteristic is linear by providing a phase difference detection means providing an output of a phase lag signal and a phase lead signal, a lead lag discrimination means and a signal selection means to the phase comparator. CONSTITUTION: A phase difference detection section 18 having MO storage element such as a latch and a lead lag discrimination circuit 23 having an RS flip-flop as a storage element are connected to input sections 16, 17 receiving a reference signal R and a variation signal V. The phase difference detection section 18 provides an output of a phase lag signal U(=R + the inverse of V) and a phase lead signal D(=The inverse of R+V) as a phase difference between the reference signal R and the variation signal V simultaneously. The flip-flop of the lead lag discrimination circuit 23 is set when both the reference signal R and the variation signal V are inverted and reset when the both are not inverted. The result is outputted to a control input of a switching device 19 as a discrimination signal Q.
申请公布号 JPH0879062(A) 申请公布日期 1996.03.22
申请号 JP19940209724 申请日期 1994.09.02
申请人 RICOH CO LTD 发明人 SHINGYOUCHI MITSURU
分类号 H03L7/089 主分类号 H03L7/089
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