| 摘要 |
PURPOSE: To provide a clock circuit which generates the clock signal having good phase precision, is scarcely affected by the fluctuation of a power supply voltage, process kinds and temperature or the like by using a low power consumption high-speed differential amplifier suitable for an array type oscillation circuit. CONSTITUTION: At a phase comparator circuit 101, a reference clock CL1 is compared with a clock signal CL2 from an array type oscillation circuit 103, a phase difference signal output S0 is passed through a voltage control circuit 106 and a low-pass filter 102, and its output S2 is inputted to the array type oscillation circuit 103. This output S2 is supplied to respective buffer differential amplifiers consisting of an array, controls its delay and allows the phases of CL1 and CL2 to match with each other. At a clock signal synthesizing circuit 105, the clock signal having desired phase and pulse width can be generated by synthesizing the output signals of respective arbitrary differential amplifiers inside the array type oscillation circuit 103 while using those output signals. |
