| 摘要 |
PURPOSE: To enable boosting even at low-power supply voltage by inputting a second input rising at a time later than the fall of a first input to first boosting capacitance to second boosting capacitance and connecting a second switch and a first switch. CONSTITUTION: When an input terminal (VIN) reaches L9, a node (NA) is boosted by MOS capacitance C2 and reaches VCC+Vt+αlevelα, an NMOS 3 is turned on, an output terminal (VOUT) is pre-charged up to a VCC level. When the VIN is changed into H from L, an output from an inverter 2 is altered into H from L, and the VOUT is boosted by positive charges charged by the gate of MOS capacitance C1, and reaches the VCC+Vt+ the levelα. An output from a control circuit 10 is varied into L from H at that time, and voltage at NA is lowered up to a level lower than VCC-Vt in the MOS capacitance C2, but the voltage of the VOUT boosted up to the VCC+Vt+ the levelαis applied to a gate for an NMOS 14, the NMOS 14 is turned on, and the NA is pre-charged up to a VCC level.
|
