| 摘要 |
a) connecting the clear terminal and the pre-fixed terminal of flip-flops to a reset signal input terminal; b) connecting the output terminal of the first flip-flop to the input terminal of the second flip-flop; c) connecting the output terminal of the second flip-flop with the p-channel MOS, the n-channel MOS, the gate terminal, and the inverter of a shift register; d) connecting an OR gate to the output terminal of the flip-flops of the shift register; e) connecting RS latch unit to the output signals of the OR gate and the input signals of the fourth flip-flop; e) connecting a NOR gate to the converted output signals of the RS latch unit; f) connecting the output signals of the NOR gate to the clock terminal of the flip-flops of the shift register; g) connecting the output signals of the flip-flops to n-channel MOS; and h) connecting the output signals of the third and the fourth flip-flops to the n-channel MOS of a selecting unit.
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