| 摘要 |
This invention provides a multilayer substrate suited for hybrid ICs. The multilayer substrate is formed from a plurality of layered insulating layers, at least one of which is provided with an inner-layer wiring space extending in the planer direction of the insulating layers and filled with a conductive wiring material. The inner-layer wiring space, which can be in the form of a strip, is connected via through holes to flip chip ICs, resistors, etc., so as to form a circuit. The inner-layer wiring composed of a wiring space extending in the planer direction and filled with a conductive wiring material has a larger cross-sectional area for the passage of electric current and is lower in electrical resistivity, in comparison with conventional wiring formed by printing.
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