发明名称 Data processing system having a high speed burst access
摘要 <p>A data processing system includes a microprocessor and a memory coupled to each other, and has a burst access function in which when an active burst request signal is supplied to the memory, only a first address is outputted to the memory, so that a plurality of items of data are accessed sequentially from the first address. A memory region of the memory is divided into a plurality of memory blocks, and the microcomputer includes a register for storing a burst access/single access information for each of the memory blocks, and a decoder receiving an address to be outputted to the memory, for knowing to which memory block a memory region to be accessed belongs. When the memory region to be accessed is a memory block for the burst access, a burst request signal is activated. &lt;MATH&gt;</p>
申请公布号 EP0701216(A1) 申请公布日期 1996.03.13
申请号 EP19950114246 申请日期 1995.09.11
申请人 NEC CORPORATION 发明人 SONOBE, SATORU
分类号 G06F12/02;G06F13/16;G06F12/06;G06F13/28;G06F13/32;G06F13/42;(IPC1-7):G06F13/42 主分类号 G06F12/02
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