发明名称 Digital processor capable of concurrently executing external memory access and internal instructions
摘要 The digital processor includes an instruction memory, a sequencer, a decoder, and a memory reference control circuit. In case the sequencer reads the external memory reference instruction, the memory reference control circuit serves to fetch an external memory reference instruction signal and an operand of the external memory reference signal delivered from the decoder, hold the operand until the external memory cycle executed by the external memory reference instruction is terminated, and release the operand when the cycle is terminated. The sequencer serves to have succeeding instructions read out continuously while the external memory reference instruction is being executed, and to concurrently execute the read-out instructions when the read-out instructions refer to resources not occupied by the external memory reference instruction, so as to execute the read-out instructions in parallel with the external memory reference instruction, thereby improving the throughput of the total processing.
申请公布号 US5499348(A) 申请公布日期 1996.03.12
申请号 US19940266104 申请日期 1994.06.27
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 ARAKI, TOSHIYUKI;AONO, KUNITOSHI;TOYOKURA, MASAKI
分类号 G06F9/38;(IPC1-7):G06F9/38 主分类号 G06F9/38
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