发明名称 |
Method for accessing and transmitting data to/from a memory in packets |
摘要 |
A method of transmitting digital information to a memory circuit of a plurality of memory circuits of a computer system through a multiline bus of the computer system is described. The plurality of memory circuits are coupled together via the multiline bus. The multiline bus has a total number of lines less than a total number of bits in any single address. A first word of a packet is transmitted onto the multiline bus. A second word of the packet is then transmitted onto the multiline bus. The second word of the packet includes a first portion of an address. A third word of the packet is transmitted onto the multiline bus. The third word of the packet includes a second portion of the address.
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申请公布号 |
US5499385(A) |
申请公布日期 |
1996.03.12 |
申请号 |
US19920849212 |
申请日期 |
1992.03.05 |
申请人 |
RAMBUS, INC. |
发明人 |
FARMWALD, MICHAEL;HOROWITZ, MARK |
分类号 |
G06F1/10;G06F11/00;G06F11/10;G06F12/00;G06F12/02;G06F12/06;G06F13/16;G06F13/376;G11C5/00;G11C5/06;G11C7/10;G11C7/22;G11C8/00;G11C11/401;G11C11/407;G11C11/4076;G11C11/409;G11C11/4096;G11C29/00;(IPC1-7):G06F13/00 |
主分类号 |
G06F1/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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