| 摘要 |
A semiconductor device (10) has a capacitor structure formed within an opening (30) of a stack of a dielectric layer (24), a conductive layer (26), and a dielectric layer (28). A first capacitor electrode is formed by conductive sidewall spacers (32) which are in electrical contact with conductive layer (26) along sidewalls of the opening. A capacitor dielectric (34) is formed on the sidewall spacers. A second capacitor electrode is formed by a conductive layer (38), either alone or in conjunction with a second set of conductive sidewall spacers (36). In one embodiment, the capacitor is formed over a gate electrode (15) of a bulk transistor and makes contact thereto. The capacitor structure is particularly suited for use in an SRAM cell.
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