摘要 |
PURPOSE: To prevent an output clock from fluctuating with time even if a delay time of an amplifier element that constitutes the voltage-controlled oscillator fluctuates by adopting such a configuration that has neither paths through which all of two sets of output terminals are in-phase nor ones in opposite phase. CONSTITUTION: The oscillator is provided with a ring oscillator R1 in which three amplifier elements A1 to A3 are connected in a ring, a ring oscillator R2 in which three amplifier elements A4 to A6 are connected in a ring, and a ring oscillator R3 in which three amplifier elements A7 to A9 are connected in a ring. Thus, output terminals of the 3×3 sets of amplifier elements are connected to new amplifier element A10 to A18. In considering all signal paths passing through a same output terminal in all combinations of two sets of output terminals among the input terminals of the 3×3 sets of amplifier elements being components of the three ring oscillators R1 to R3, both of paths where signals through all of two sets of output terminals are not in phase and not in opposite phase are not provided.
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