发明名称 DESIGNING METHOD FOR PRINTED CIRCUIT BOARD
摘要 PURPOSE: To reduce the influence of crosstalk noises, etc., and also to shorten the time needed for correction of the overlapping of wirings by checking this overlapping between the upper and lower layers touching with each other and giving a correction according to the designing state of a printed circuit board in order to minimize the overlapping part of both wirings. CONSTITUTION: When the wiring design is applied to a printed board having two or more layers, the overlapping is checked between a pre-wiring 1 and a post-wiring which are provided on the upper and lower layers touching with each other. If the overlapping is confirmed and both wirings can be moved in parallel to each other, the post-wiring is moved in parallel up to a point where it does not overlap the pre-wiring 1 at all (correction pattern A). Otherwise the overlapping part is minimized between both wirings (correction pattern B). If the parallel movements of both wirings are impossible, it is decided whether the post-wiring can be tilted or not. If can be tilted, the post-wiring is tilted so that the overlapping part is minimized (correction pattern C). If cannot be tilted, both wirings are fixed as they are.
申请公布号 JPH0869487(A) 申请公布日期 1996.03.12
申请号 JP19920042602 申请日期 1992.02.28
申请人 NEC CORP 发明人 SHINDO TATSUYUKI
分类号 H05K3/00;G06F17/50;H01L21/82;H05K3/46;(IPC1-7):G06F17/50 主分类号 H05K3/00
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