| 摘要 |
A process is disclosed for forming an integrated circuit device, such as an EPROM device, with a floating gate electrode with a discontinuous phase of metal silicide formed on a surface thereof is described. The process for forming such a discontinuous phase of metal silicide on the surface of a polysilicon floating gate electrode for the device comprises the steps of depositing a first polysilicon layer over a substrate, and preferably over a thin oxide layer on the substrate capable of functioning as a gate oxide; then forming a very thin layer of a silicide-forming metal over the polysilicon layer; and heating the structure sufficiently to cause all of the silicide-forming metal to react with the underlying polysilicon layer to form metal silicide and to coalesce the metal silicide into a discontinuous phase on the surface of the polysilicon layer. When an EPROM device is to be constructed, the process includes the further steps of forming an first insulation layer over the structure; forming a second polysilicon layer over the first insulation layer; and then forming a second insulation layer over the second polysilicon layer. The structure is then patterned to form a dual gate electrode structure with a floating gate and a control gate. After doping of the underlying substrate to form the source and drain regions, a further oxide layer may be formed over the entire structure and contact openings may be cut to the source and drain regions and control gate electrode, thus completing formation of an EPROM device with a floating gate having a discontinuous phase of metal silicide on a surface thereof facing the control gate.
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