| 摘要 |
PURPOSE: To provide a method for manufacturing an MOS transistor with an LDD(lightly doped drain) structure applicable to a highly integrated semiconductor-integrated circuit, wherein the LDD structure is formed without a conventional gate sidewall spacer. CONSTITUTION: On a gate oxide film 12 formed on a P-type Si substrate 11, a poly Si layer 13 is formed. A nitride film 14 is formed on the poly Si layer by CVD method, and a photoresist is coated over it and a gate electrode pattern is formed by photolithographic technique. With the pattern as a mask, a nitride film is plasma-etched, then selective etching is performed with the poly Si layer up to a specified thickness, and the mask is removed. The exposed part of the poly Si layer 13 is thermal-oxidized completely as far as its bottom part to form a poly Si oxide film 16, while the Si layer at the lower part of oxide film 14 is not oxidized. With the nitride film as a mask, the poly Si oxide film is etched to form a gate pattern, and ion is implanted into the substrate part at its both ends to form a high-concentration N-type impurity region 18 and a low-concentration N<-> -impurity region 20, then annealed in an oxidizing atmosphere.
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