发明名称 LOGICAL OPERATION CIRCUIT WITHOUT WIRING
摘要 PURPOSE: To eliminate wiring between transistors by arranging an element by permitting the center of spherical or cylindrical conductive material to accord with a lattice point on the prescribed row and transmitting electrons or particles in the conductive material by tunnel phenomenon. CONSTITUTION: A major part is composed of two input parts 1002 and 2003, which input electrons, an interaction area 2001, a branching area 40, an observation area 50 and an output area 60. Conductive material is arranged in each area, permitting the centers of the conductive material to accord, and a logical circuit 70, which is to be an OR gate, is provided. The logical circuit 70 permits electrons inputted to the input areas 2002 and 2003 to be outputted from the branching area 40, all electrons are to be inputted to the observation area 50, and the observation area 50 outputs electrons to the output area 60 when electrons are inputted. The conductive material is connected by one-electron tunnel phenomenon, and an electron to be the signal can be transmitted between the conductive material without arranging wiring.
申请公布号 JPH0864803(A) 申请公布日期 1996.03.08
申请号 JP19940201763 申请日期 1994.08.26
申请人 HITACHI LTD 发明人 IHARA SHIGEO;KANBARA SHIRO
分类号 H01L29/06;H01L29/66;(IPC1-7):H01L29/66 主分类号 H01L29/06
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