发明名称 INSTANTANEITY PRIORITY CONTROL SYSTEM
摘要 <p>PURPOSE: To perform the effective ana stable control by adding instantaneity priority information corresponding to the instantaneity priority to each one field of an internal cell at the time of conversion to the internal cell and allowing the priority and the asynchronous transfer mode connection to correspond to each other. CONSTITUTION: An ATM multiplexed cell is inputted to a frame synchronizing part 11. The synchronizing part 11 synchronizes frames of this cell and transfers it to a cell synchronizing part 12. The synchronizing part 12 synchronizes the cell and transfers it to a cell conversion part 13. This part 13 converts the cell to an internal cell and outputs it to a line branch part 15. The internal cell whose routing path is unequivocally determined by the line branch part 15 is stored in a common buffer 16. The cell stored in the buffer 16 is outputted to a pertinent circuit I/F part through output buffers 17-1 to 17-N. If the traffic volume of the line is larger, the ready control is performed from corresponding output buffers 17-1 to 17-N through a flow control line 18-1.</p>
申请公布号 JPH0865308(A) 申请公布日期 1996.03.08
申请号 JP19940193272 申请日期 1994.08.17
申请人 TOSHIBA CORP 发明人 KISHIGAMI TORU
分类号 H04L29/06;H04L12/28;H04Q3/00;(IPC1-7):H04L12/28 主分类号 H04L29/06
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