发明名称 SEMICONDUCTOR MEMORY
摘要 <p>PURPOSE: To realize a folded bit line system and to enable high speed random read without increasing a chip area by replacing a selecting gate electrode of a source side of a NAND cell with an adjacent NAND cell. CONSTITUTION: Sense amplifier SA0 and the like input a signal from an adjacent pair of bit line BL0 ,/BL0 , and are made as a folded bit line system. And a selecting gate of a source side is used in common in two NAND columns using a source line in common, also, gate electrodes SGS2 , SGS3 of a selecting transistor(TR) are twisted. Therefore, when one side of selecting TRSTE 20, STS21 and the like is turned on, the other side is turned off, when one side of the pair of bit line BL0 /BL0 is discharged, the other side is not discharged, a folded bit line system can be realized and high speed random read can be performed without increasing a chip area.</p>
申请公布号 JPH0863980(A) 申请公布日期 1996.03.08
申请号 JP19940219497 申请日期 1994.08.22
申请人 TOSHIBA CORP 发明人 TAKEUCHI TAKESHI;SAKUI YASUSHI;TANAKA TOMOHARU
分类号 G11C17/00;G11C16/02;G11C16/04;G11C16/06;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/02 主分类号 G11C17/00
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